Keeping Ahead of the Curve with Custom ASICs
they required. It was inefficient and costly.
As a result, they were in a “make do”
situation and being challenged by their end
customer on performance and price.
On-chip calibration functionality (RC
Time constant, IP2, Image Rejection
and IQ Gain/Phase)
Embedded algorithms for DC offset
correction
The resulting solution which contained all
the above functionality achieved the
following results for the end customer:
By going the custom ASIC route, the
company was able to specify exactly the
requirements they wanted, with key criteria
including:
Smaller physical footprint
Improved performance
Lower power consumption
Decreased cost
Results
55% reduction in the physical size of the
product
Improved signal integrity and reliability
The custom ASIC was developed in 12
months on a 0.18um RF CMOS process from
TSMC and included:
57% reduction in power consumption
80% reduction in the bill of material costs
Integrated transmitter and receiver
blocks (L-band receiver to support
multiple modulation schemes)
Investment breakeven 175k units
Figure 6: Before and after of product size comparison (resultant board is on the right)
potential, there are many challenges. In this
new era, where the cyber world is meeting
the physical world, developing edge
computing systems using the same tried and
tested methods of the past with commercial
off-the-shelf electronic components is no
longer a viable approach. Considering the
C ONCLUSION
While the Industrial Internet of Things offers
many opportunities to enhance the
efficiency and control of our processes and
systems, and increase our business
IIC Journal of Innovation
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