Keeping Ahead of the Curve with Custom ASICs
economically possible previously when using
discrete components. Central to the design
discussions were the sensing and
measurement
needs,
the
control,
programmability, and connectivity needs
and finally the security needs for the final
solution. A solution using TSMCs 0.18um
CMOS process was delivered featuring:
Examination of the results also show that
this customer broke even on the ASIC
investment after shipping over 42k units and
will have estimated cost savings of over
$21m over the accumulated cost of the
lifetime of the project.
Analog front end (AFE) comprising
14-bit
SAR
Analog-to-Digital
Converter (ADC), 12-bit control DAC,
power switches, analog multiplexers
and operational amplifiers
Multiple industrial communications
interfaces including FOUNDATION
Fieldbus and Highway Addressable
Remote Transducer (HART)
Arm Cortex-M4 CPU core
PIC microcontroller
Flash and SRAM memories
Multiple
peripheral
interfaces
2
including SPI, UART, I C and Parallel
Discrete Solution
ASIC Solution
Figure 5: Comparison of ASIC solution vs Discrete Solution
total savings including breakeven volume
Machine-to-Machine
In another case study, a company was
developing Machine-to-Machine (M2M)
technology in the area of mobile satellite
services. They were at a run rate of 100k
units per year. This is a very niche area of
wireless communications, providing two-
way voice and data communications for
mobile assets in remote locations. Reducing
the system size and being able to guarantee
signal quality and enhanced connectivity
while keeping costs low are key concerns.
While the company had already moved from
a fully discrete solution by using an
Application Specific Standard Product (ASSP)
on their board, the product was still too
generic for their requirements, and was
therefore not optimized for the performance
The resulting solution which contained all
the above functionality achieved the
following results for the end customer:
Results
Bill of materials cost reduction of 85%
Substantial reduction in the physical
footprint with a custom ASIC in a 19mm x
19mm package
Power efficiency, meeting the low-power
budget supplied from the 4-20mA control
loop
Design for portfolio tiering
Investment breakeven 42k units
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March 2019