is to increase the reliability by improving the repair capability and overall malfunction detection.
The core transistor logic used in Block I design had several
disadvantages.
• Inability to compute basic operation of computer arithmetic: change a one to a zero and vice versa
• Loss of datum read from a flip-flop using core transistor
logic
• Had non-fixed memory cycle time (average cycle time was
19.5 milliseconds)
As a result, MIT decided to use direct coupled transistor
logic (DCTL); NOR gates with three inputs consisting of
three transistors and four resistors. Nearly 5000 such circuits were used to build the Apollo computer as the use of
NOR gates increased the reliability and the simplicity. The
cycle time for this design was 11.7 milliseconds where the
speed was increased and the time was consistent. Later, the
Source: www.space.com
MIT team integrated ICs into the Apollo Computer which
craft arrived at the Moon, it would enter the lunar orbit and
helped to increase the computation speed.
the lander would be detached to the surface. Once the mis-
The Apollo Guidance Computer weighed 70.1 pounds and
sion on the Moon is completed, the lander would take back
required 70 watts at 28 volts DC. It was equipped with dis-
the crew to the spacecraft in the orbit and transfer them to
play and keyboard units (DSKY – Display and Keyboard).
the Command Module. Then the Command Module would
return back to the earth.
H A R DWA R E
In this mission, onboard computers were needed in the
The MIT used the 16-bit word in Apollo computer after con-
Command Module and the lander (Lunar Excursion Module-
sidering several factors such as precision required for navi-
LEM) for guidance and the navigation support. This whole
gation variables, the range of input and instruction word
system including the onboard computers in the CM and the
format. The use of a shorter word length had advantaged
LEM was referred as Primary Guidance, Navigation and Con-
in simpler circuits and speed. Of the 16 bits, 14 bits were
trol System (PGNCS) by NASA. There were three subsystems
data while the remaining two bits were a sign bit and a
in the PGNCS.
parity bit.
• CO M P U T E R S U B S Y S T E M → onboard computers on CM
The computer circuits in the Apollo computer were in two
ertial Reference Integrating Gyros and acceleration Pulse
electronics, analog alarm devices and the clock with 1 MHz
and LEM
trays, where tray A had the logic circuits, interfaces and
• I N E RT I A L S U B S Y S T E M → measures attitude using In-
the power supply while tray B had the memory, memory
Integrating Pendulous Accelerometers
speed. To reduce the size and the weight, fewer flip flops
• O P T I CA L S U B S Y S T E M → uses two sextants and a scan-
were used and the computer was built with a single ad-
ning telescope in the CM and a simple telescope in LEM
der circuit where most of the arithmetic computations were
This article will focus on the Computer Subsystem which is
done.
known as the “Apollo Guidance Computer”.
M E M O RY
A P O L LO G U I DA N C E CO M P U T E R ( AG C )
Erasable memory cells were used to store the intermediate
The early lunar missions had only the Command Module
results of various calculations, the location of the space-
in their spacecraft and thus used the same technology as
craft and registers for logic operations. In the original de-
in Polaris mission, which is known as Block I. However, the
sign, MIT created 4K (Now known as kilobytes) words of
design to have a separate Command Module and a lunar
fixed memory and 256K words of erasable. After several
excursion module in the Apollo 11 had led to the design of
modifications, the final design had 36K words of fixed
a new technology known as Block II over the architecture of
memory and 2K words of erasable memory. These changes
the Polaris missile system. Another reason to have Block II
were the results of software development problems that
Gauge Newsletter
University of Peradeniya
23