In Conversation
infrastructure including IP management. Design complexity does not scale equally with organizational complexity( small teams can design complex products), so we provide solutions for that middle ground as well.
ELE Times: What are the main key points IC Design engineers should look for in an EDA tool before buying?
Harry Foster: The success of the electronics industry has been grounded in both EDA innovation and automation. But equally important in the successful adoption of advanced EDA tools is robustness and quality in the generated results. Tools that do a second-rate job can actually miss errors or potentially identify errors that really aren’ t there( false positives). In the case of false positives, you can waste a significant amount of time trying to find an error that doesn’ t actually exist. And if you actually have a design that has an error, and it doesn’ t get detected before you send it to manufacturing, it can lead to chips needing to be re- spun. This can lead to market delays and depending on the
Mentor Graphics also offers embedded software development tools. Software is of course becoming a greater component of modern systems, especially emerging IoT devices and advanced market cost millions or even billions of revenue. And if an error automotive designs. isn’ t detected until a product is out in the market, in some cases it ELE Times: Growing introduction of Internet of Things( IoT) can lead to product recalls. devices tell us something about design verification challenges?
Kindly provide a brief introduction to“ Portable Stimulus”
ELE Times: How different it is to develop software for manufacturing giants and for scholars and researchers?
Harry Foster: During the past decade or so, the electronics industry has done a remarkable job of adopting new advanced verification technologies to address rising design complexity. For example, the introduction of constrained-random simulation helped verification engineers generate several orders of magnitude more stimulus using automation versus hand-written directed test. The introduction of commercial verification IP provided engineers more-efficient ways to interact with complex interface protocols. The UVM standard brought reuse methodology to verification environments, both in terms of infrastructure and best practices. However, while these techniques have done wonders to improve block- and subsystem- level verification, they have not scaled effectively( nor productively) to the SoC, full chip or system-level verification process, nor will they do so in the future.
Harry Foster: Mentor Graphics EDA tools and solutions have been successfully adopted by both industry and academia, and we see no difference in the way we develop our tools for our various stakeholders. Both industry and academia are very important to us. In fact, we actively participate in both academia and industry educational programs and partnerships to help train the next generation of innovators. Through our company’ s Higher Education Program, Mentor Graphics strives to develop long term relationships with engineering colleges and universities around the world. For example, Mentor Graphics has partnered with more than 1200 colleges and universities worldwide. The program provides: access to millions of dollars’ worth of Mentor Graphics software for a minimal customer support fee; free access to regular customer training for all faculty / staff in the department; and access to technical support services for faculty and staff of the department. These partnerships are mutually beneficial as their research helps us better foresee what design challenges are on the horizon and proactively develop technologies to overcome those challenges.
ELE Times: Can EDA technology for designing integrated circuits be applied to the design of systems? Kindly tell us something in this perspective.
To address this evolution( and revolution) in complex design, Mentor Graphics provides EDA tools to design complete electronic systems, from the chip’ s packaging, to printed circuit boards, to multiple boards integrated with connectors and cables, to systems of systems such as automobiles and factory equipment, integrating increasingly with mechanical / mechatronic tools to create smart cars, smart factories and even smart cities.
ELE Times | 52 | March, 2017
Veloce Strato OS enterprise-level operating system forms the foundation for a common infrastructure for all Veloce Strato hardware and software applications.
Harry Foster: The term“ system design” or what actually constitutes a system is ever evolving with increasing degrees of integration and minimizations. Today, thanks to EDA technology and silicon process miniaturization, you can integrate essentially the compute power of entire electronic system into a single chip; consisting of multiple processors, digital logic, analog, mixed- signal, and often radio-frequency functions.
A new way of thinking about verification is essential to productively and effectively verify today’ s designs. What is required for SoC verification is the ability to generate system-level use-case test scenarios. These scenarios often require software running on an embedded processor that must be synchronized with interface stimulus and events. Scenario-based testing is difficult to achieve using existing verification approaches( such as UVM). In addition, today’ s verification engineers want to describe the intent of a given test, and then let automation generate the low-level details for the appropriate test scenario. Finally, today’ s verification engineers want to describe the intent of a test once, and then allow automation to retarget the test across different verification engines( e. g., simulation or emulation or prototyping). The Accellera Portable Stimulus Standard is currently being developed to meet these goals, and Mentor Graphics is activity involved. In fact, Mentor Graphics has been a leading researching in graph-based portable stimulus for many years. For example, our Questa in Fact solution is the industry’ s most advanced Portable Stimulus test bench automation solution.