In a digital power supply unit( PSU) there are several factors that  | 
 over the existing dsPIC33FJ devices. If we take a control loop that  | 
 impact loop gain performance that are specific to the  | 
 executes at a rate of 250kHz and is 60 instructions, this consumes  | 
 microcontroller. These factors include maximum sampling rate,  | 
 a total of 15MIPS or 30 % of the available resources on the  | 
 time required to execute compensator algorithm( s),  | 
 dsPIC33FJ devices. This same control loop code consumes only  | 
 sampling / conversion time of analog to digital converter( ADC),  | 
 20 % of the available CPU resources on the new dsPIC33EP  | 
 and microcontroller operating speed. For peak current mode  | 
 processor when executed at the same sampling frequency. If the  | 
 control converters, the speed of the comparator and the  | 
 same percentage of MIPS is consumed after migrating to the new  | 
 accuracy / speed of the control digital to analog converter( DAC)  | 
 dsPIC33EP devices then this allows the control loop to be  | 
 will also have an impact on the PSU loop gain performance. All of  | 
 executed at a rate of 350kHz. Further analysis shows that phase  | 
 these items need to be considered when selecting a  | 
 erosion is reduced by 29 % at a given crossover frequency. See  | 
 microcontroller for a given application. Let’ s take a look at how  | 
 Figure 1 for calculation of phase erosion due to sampling vs. cross  | 
 Microchip’ s dsPIC33EP‘ GS’ devices can help improve loop gain  | 
 over frequency.  | 
 performance for the next generation of power supplies.  | |
 The most noticeable feature of the new dsPIC33EP devices is the  | |
 increase in operation frequency. The operating frequency of the  | |
 new dsPIC33EP devices has increased to 70MHz, which is a maximum increase of 20 million instructions per second( MIPS)  | 
 Figure 1: Phase Erosion due to Sampling  |