ACE Issue 40 2025 | Page 6

DOUBLE THE POWER WITH COMPACTPCI ® SERIAL REVISION 3.0

INTRODUCTION AND KEY ENHANCEMENTS
CPCI Serial R3.0 compliant interoperability demonstration proven architecture while maintaining backward compatibility making system upgrades more seamless than ever.
Key enhancements Revision 3.0
Thanks to full backward compatibility, Revision 3.0 not only supports existing capabilities but also pushes performance further with a significant increase in speed and bandwidth. Overall, this latest revision introduces the following features and enhancements over the previous version.
• PCI Express Gen 4 support( up from Gen 3)
nVent SCHROFF, specialists in electronic systems protection for industrial and computing applications, and EKF Elektronik, a leading manufacturer of modular, ruggedized embedded boards and systems, today announced the successful interoperability demonstration of their technologies based on the new CompactPCI Serial Revision 3.0 standard. This update doubles system bandwidth, enhances interoperability, and supports modern, data-intensive applications across embedded and rugged systems.
New PICMG standard for the embedded industry
Officially released by the PCI Industrial Computer Manufacturers Group( PICMG) on February 2, 2025, the updated specification delivers twice the data throughput and significantly enhanced connectivity. This enhancement offers a timely response to the embedded industry’ s growing demand for high-speed, real-time data processing. As active members of PICMG, nVent SCHROFF and EKF have collaborated to ensure their respective technologies are now fully interoperable in line with the new standard and ready for deployment in the field.
Building on a legacy of performance
Since the launch of CompactPCI Serial Revision 1.0 in 2011, followed by incremental advancements introduced in Revision 2.0 in 2015, industry demand has continued to surge for higher speeds and greater system flexibility. Revision 2.0 was published in 2015, which further developed the rear connectivity. Revision 2.0 specified P6 connectors for rear I / O, which offer a more flexible connection option for modular systems. Now, Revision 3.0 builds upon this
• Integrated 10G Ethernet via backplane( Ethernet 10KR4)
• USB 3.2 Gen 2x1( 10 Gbps)
• Enhanced signal integrity via VSe connectors and high-speed PCB materials
• 8-link PCIe connections from system slot to peripheral slots, ideal for multi-GPU setups
Mechanical and electrical innovations
Due to the increased bandwidth, modifications to the backplane connectors and PCB material are essential to maintain signal integrity at higher speeds. Specifically, CPU boards now require a VSe connector and high-speed PCB material, replacing the previous VS connector and standard PCB material. Consequently, the backplane must include at least a VS2 connector at the CPU slots. While peripheral cards do not require a VSe connector, they may still necessitate high-speed PCB material, depending on the application.
All boards remain backward compatible and fully compatible with existing backplane receptacles. However, the connector housings are slightly thicker, which impacts mechanical spacing. As a result, the system slot must support a 4HP board-to-board spacing. When using three VSe connectors side by side, an extension to 5HP is required.
From concept to concrete use
Vision systems are rapidly gaining traction across a wide range of industries, particularly in quality
6 AUTOMATION, CONTROL & ENGINEERING