TheOverclocker Issue 24 | Page 24

two SIMMs were required for 16-bit memory access (supported by the 386) and four for 32-bit access (supported by the 486). INTRODUCTION OF THE CPU MULTIPLIER In 1992, INTEL released the 486DX2 processor which introduced the concept of the CPU multiplier. Up until then, the CPU ran at exactly the same speed as the system bus, whereas the 2x multiplier seen on the 486DX2 allowed the CPU to operate at twice the speed. The 486DX2 was also the first time that INTEL started binning CPUs with chips failing internal tests being sold as the 486SX, which had the FPU included but disabled. This practice was later applied to CPU frequencies as well, where a processor failing testing using a 2x multiplier might be sold as one using a 1x multiplier. Worth noting is that there was a 24 The OverClocker Issue 24 | 2013 80487 co-processor which could be bought separately for systems with the SX chip so as to add the missing FPU functionality. This was a fully functioning 486DX chip which actually disabled the 486SX CPU and took over all CPU functions. This really opened up the gates for overclockers, as while some failed chips could only manage a slight increase over their stock speed, others could get to within a few MHz of the next speed grade or even more. As CPU voltages could not be selected by the system automatically, the user would have to dial in the voltage manually using either DIP switches or jumpers. A higher than stock voltage often meant that the processor would be capable of frequencies in excess of models which were two or more speed grades above. This also introduced the concept of “clock ceilings”, where between the manufacturer and overclockers the speed limits of a process and architecture could be found. By 1993, INTEL had released the Pentium processor using the P5 architecture, but with an FPU bug, these CPUs suffered from limited widespread adoption. These original Pentium processors had an FSB of either 60MHz or 66MHz, and a 1x multiplier. With successively higher bus speeds, higher frequency RAM became a reality, while the new 64-bit memory controller meant a wider bus would be needed for the RAM. The old 30-pin, 8-bit SIMMs were replaced by 72-pin, 32-bit EDO (Extended Data Out) SIMMS. As the Pentium supported 64-bit memory access, EDO SIMMs required installation in pairs. EDO RAM had another advantage, however. When starting a new cycle, it could keep the data path open from the previous memory access, bringing timings down to 5-2-2-2. The following year, the company released IntelDX4 (sometimes referred to as the 486DX4/100) which had a 3x multiplier. This allowed for CPUs to operate at up to 100MHz by using a 33MHz FSB and 3x multiplier, although some versions used a 25MHz FSB and 3x multiplier. We had finally arrived at the era of CPU multipliers. As useful as multipliers had proved, there was one large downside (at least from a CPU manufacturer’s perspective). The 486 SX25 for example could often operate with perfect stability simply by moving a jumper or flicking a DIP switch to increase the system bus to 33MHz. It was so easy and efficient that several retailers caught on, leading to fraudulent sales and the first overclocking scam. INTEL's first attempt to combat this was only several years later with a locked 2x multiplier on the Pentium 133 (S-Spec SY022). The multiplier lock was seen again on most Pentium MMX chips, and with the introduction of the Pentium II it became the norm; a lock which would stay in place until the launch of the Pentium Extreme Edition in late 2003.