TheOverclocker Issue 24 | Page 21

Overclocking may have only become a mainstream hobby is the last decade, but its roots can be traced back to the PC itself. While the methods used to overclock may have changed, the goal has remained the same – “increase the performance of your computer”. Much like modifying a car's engine, overclocking can be done for one or two reasons. Either you can increase the performance of a cheap model to match that of a more expensive model, aim for performance greater than that of any off-the-shelf components or both. HOW IT WORKS A clock speed is generated by a clock crystal known as a crystal oscillator, Quartz usually the crustal of choice. When an electric current is passed through the crystal, it produces a steady pulse of 14.318MHz - this is called the system clock. It is not unique to computers and can be seen in televisions amongst other things. However, to the computer this is a seemingly useless frequency as nothing runs at 14.318MHz. To combat this problem, a circuit is used to derive the speeds required. This circuit is known as a PhaseLocked Loop, or PLL. Several of these circuits can be seen in a single clock generator, which is a chip running alongside a nearby 14.318MHz oscillator. The clock generator gives off the required frequencies for the BCLK, PCI-Express bus (if it is not tied to the BCLK), PCI bus, RAM and anything else which needs a clock speed. The PLL allows us to change these speeds through a few components - a phase comparator, a Voltage Controlled Oscillator (VCO), and a down counter (divider). The phase comparator has two inputs; one for the reference clock speed of 14.318MHz and the other for is a looped-back input for the frequency from the VCO. The phase comparator then compares the two frequencies and generates a voltage based on the difference. Should both values be the same, the output voltage will remain unchanged and the VCO will continue to oscillate at the current rate of 14.318MHz - the same rate as the crystal oscillator. In order to generate a faster clock speed, a divider is introduced after the VCO as it is looping back to the phase comparator. If a divider of two were to be used, the VCO would feed in 14.318MHz to the divider which would result in an output of 7.159MHz. This 7.159MHz frequency is then fed back into the phase comparator which tricks it into thinking it is only operating at half the frequency it should. The phase comparator compensates for this by hitting the VCO with more voltage to get the output frequency doubled back up to 14.318MHz. The result of this trickery is an actual output of 28.636MHz which is siphoned off and becomes the new output frequency for the system. The divider feeds 14.318MHz back to the phase comparator, which assumes that the previous voltage output was correct. It then continues to output the same voltage, keeping the higher system speed. The IBM XT computer ran at a clock speed of 4.77MHz. We can see that reversing this process by introducing a multiplier into the system instead of a divider would result in a lower system speed. By using a multiplier of three, the phase comparator would be fed an input of 42.954MHz from the VCO. It compensates for this, reducing the voltage until the VCO outputs just 4.773MHz. This 4.773MHz is once again fed through the multiplier which in turn reports the current frequency to the phase comparator as 14.318MHz. Issue 24 | 2013 The OverClocker 21