Tesi Robotica Un co-processore per Stereo-Matching: Architettura | Page 107

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“LP_Tesi” — 2011/9/9 — 21:20 — page 107 — #107

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Bibliografia

[1] Carlo Brandolese, William Fornaciari - Sistemi embedded, sviluppo hardware e software per sistemi dedicati - Pearson Prentice
Hall;
[2] Romain Dieny, Jerome Thevenon, Jesus Martinez-del-Rincon,
Jean-Christophe Nebel - BIOINFORMATICS INSPIRED ALGORITHM FOR STEREO CORRESPONDENCE;
[3] Rishiyur S. Nikhil and Kathy Czeck - BSV by Example: The
next-generation language for electronic system design;
[4] BluespecTM SystemVerilog Reference Guide - Copyright (c) 2000
– 2009 Bluespec, Inc;
[5] Pong P. Chu Cleveland State University - FPGA PROTOTYPING BY VHDL EXAMPLES - Xilinx SpartanT;
[6] Wikipedia - the free Enciclopedia - www.wikipedia.org.

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