Tesi Robotica Algoritmi ed architetture per la risoluzione di... | Page 138

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1020

1025

1030

1035

1040

assign hex_LEDs[6] = (~x[3] & ~x[2] & ~x[1]) |
(x[3] & x[2] & ~x[1] & ~x[0]) |
(~x[3] & x[2] & x[1] & x[0]);
endmodule
‘timescale 1 ns / 1 ns
module main_tb
(
);
reg clk;
reg reset;
reg start;
wire [31:0] return_val;
wire finish;
top top_inst (
.clk (clk),
.reset (reset),
.start (start),
.finish (finish),
.return_val (return_val)
);

1045

initial
clk = 0;
always @(clk)
clk <= #10 ~clk;
1050

1055

initial begin
//$monitor("At t=%t clk=%b %b %b %b %d", $time, clk, reset, start, finish
, return_val);
@(negedge clk);
reset <= 1;
@(negedge clk);
reset <= 0;
start <= 1;