Tesi Robotica Algoritmi ed architetture per la risoluzione di... | Page 126

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wire [7:0] memory_controller__str1_out_b;
assign memory_controller__str1_out_b = {8{ select__str1_reg_b}} &
_str1_out_b;

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wire select__str2_b;
assign select__str2_b = (tag_b ==‘TAG_g__str2);
reg select__str2_reg_b;
wire [7:0] memory_controller__str2_out_b;
assign memory_controller__str2_out_b = {8{ select__str2_reg_b}} &
_str2_out_b;
wire select__str3_b;
assign select__str3_b = (tag_b ==‘TAG_g__str3);
reg select__str3_reg_b;
wire [7:0] memory_controller__str3_out_b;
assign memory_controller__str3_out_b = {8{ select__str3_reg_b}} &
_str3_out_b;

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wire select__str4_b;
assign select__s