Tesi Robotica Algoritmi ed architetture per la risoluzione di... | Page 121

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wire [7:0] memory_controller__str2_out_a;
assign memory_controller__str2_out_a = {8{ select__str2_reg_a}} &
_str2_out_a;
wire select__str3_a;
assign select__str3_a = (tag_a ==‘TAG_g__str3);
reg select__str3_reg_a;
wire [7:0] memory_controller__str3_out_a;
assign memory_controller__str3_out_a = {8{ select__str3_reg_a}} &
_str3_out_a;
wire select__str4_a;
assign select__str4_a = (tag_a ==‘TAG_g__str4);
reg select__str4_reg_a;
wire [7:0] memory_controller__str4_out_a;
assign memory_controller__str4_out_a = {8{ select__str4_reg_a}} &
_str4_out_a;
wire select_gimp_image1_a;
assign select_gimp_image1_a = (tag_a ==‘TAG_g_gimp_image1);
reg select_gimp_image1_reg_a;
reg [63:0] memory_controller_gimp_image1_out_a;
wire [63:0] memory_controller_gimp_image1_out_struct_a;
assign memory_controller_gimp_image1_out_struct_a = {64{
select_gimp_image1_reg_a}} & gimp_image1_out_a;

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always @(*)
begin
_str1_address_a = memory_controller_address_a [4-1+0:0] & {4{
select__str1_a}};
_str1_write_enable_a = memory_controller_write_enable_a &
select__str1_a;
_str1_in_a [8-1:0] = memory_controller_in_a[8-1:0];
_str2_address_a = memory_controller_address_a [4-1+0:0] & {4{
select__str2_a}};
_str2_write_enable_a = memory_controller_write_enable_a &
select__str2_a;
_str2_in_a [8-1:0] = memory_controller_in_a[8-1:0];

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_str3 }