ELE Times PDF 1 Nov 2016 | Page 53

Technology
Figure 4b : CE report when Cin is close to IC
Figure 3a : Odd Harmonics in a square wave
Figure 4c : CE report when Cin away from the IC , 10 dbuV extra
Design practices to mitigate EMI in switching converters
Ÿ In synchronous switching converters the placement of the Bootstrap capacitor and the bypass capacitors should be as close as possible to the high side FET driver and the low side FET driver respectively . If both the drivers are inside a single IC then the placement should be close to the IC .
Figure 3b : Low and high frequency current paths
The shaded area in figure 4a represents the critical area in a switching converter . To minimize the critical area , position of the input capacitors should be as close as possible . Figure 4b shows the CE emission when the Input capacitor ( Cin ) is located close to the IC . This minimizes the loop area and hence the impedance ( XL is proportional to Area ).
Figure 5a
Figure 5b
Figure 4a : Critical path in Buck converter
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Avoid any Vias in the switch node . Vias add inductance and can radiate .
Route short traces of width > 20mil for CBOOT , CVDD-bypass , and Gate drive .
Place output voltage divider resistors close to the Feedback
ELE Times | 53 | November , 2016