Digital logic, an Inverter or NOT gate Digital logic, an Inverter or NOT gate | Page 3

ACKNOWLEDGEMENT
Foremost, I would like to express my sincere gratitude to my advisor prof. Nisha
Dhiman for the continuous support of my Project Orientation Program, for her
patience, motivation, enthusiasm, and immense knowledge. Her guidance helped me in all
the time of research and writing of this thesis. I could not have imagined having a
better advisor and mentor for my POP.
Besides my advisor, I would like to thank the rest of my thesis committee:Prof.
Ishampal Chandra,Prof.Priyanka Rana , for their encouragement, insightful comments,
and hard questions.
My sincere thanks also goes to Dr. Sangram Bana for offering me the opportunities and
leading me working on diverse exciting projects.
I thank my fellow labmates in Roorkee College of engineering,Prince Sharma and Satya
Narayan Rai for the stimulating discussions, for the sleepless nights we were working
together before deadlines, and for all the fun we have had in the last few days.I am
grateful to prof. Shubham Sharma for enlightening me the first glance of research.
I would also like to thank my college ROORKEE COLLEGE OF ENGINEERING for
providing me a platform to show my talent and hardworks to others,and give my best to
my country.
Last but not the least, I would like to thank my family: my parents Meena and
Khursheed Ali for giving birth to me at the first place and supporting me spiritually
throughout my life.